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230 SA-1110 Developer’s Manual
Peripheral Control Module
Table 11-9 shows the LCD data pins and GPIO pins used for each mode of operation and the
ordering of pixels delivered to a screen for each mode of operation. Figure 11-7 shows the LCD
data pin pixel ordering. Note that when dual-panel color operation is enabled, the user must
configure GPIO pins 2 through 9 as outputs by setting bits 2..9 within the GPIO pin direction
register (GPDR) and GPIO alternate function register (GAFR). See the Chapter 9, “System Control
Module” for configuration information. Also note that SDS is ignored in active mode (PAS=1).
.
1
Double-pixel data mode (DPD) = 1.
Table 11-9. LCD Controller Data Pin Utilization
Color/
Monochrome
Panel
Single/
Dual Panel
Passive/
Active Panel
Screen Portion Pins
Monochrome Single Passive Whole LDD[3:0]
Monochrome Single Passive Whole LDD[7:0]
1
Monochrome Dual Passive Top LDD[3:0]
Bottom LDD[7:4]
Color Single Passive Whole LDD[7:0]
Color Dual Passive Top LDD[7:0]
Bottom GPIO[9:2]
Color Single Active Whole GPIO[9:2],
LDD[7:0]