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PRELIMINARY
CY14B108L, CY14B108N
Document #: 001-45523 Rev. *B Page 13 of 24
AutoStore/Power Up RECALL
Parameters Description
20 ns 25 ns 45 ns
Unit
Min Max Min Max Min Max
t
HRECALL
[17]
Power Up RECALL Duration 20 20 20 ms
t
STORE
[18]
STORE Cycle Duration 8 8 8 ms
t
DELAY
[19]
Time Allowed to Complete SRAM Cycle 20 25 25 ns
V
SWITCH
Low Voltage Trigger Level 2.65 2.65 2.65 V
t
VCCRISE
VCC Rise Time 150 150 150 μs
V
HDIS
[10]
HSB Output Driver Disable Voltage 1.9 1.9 1.9 V
t
LZHSB
HSB To Output Active Time 5 5 5 μs
t
HHHD
HSB High Active Time 500 500 500 ns
Switching Waveforms
Figure 10. AutoStore or Power Up RECALL
[20]
V
SWITCH
V
HDIS
V
VCCRISE
t
STORE
t
STORE
t
HHHD
t
HHHD
t
DELAY
t
DELAY
t
LZHSB
t
LZHSB
t
HRECALL
t
HRECALL
HSB OUT
Autostore
POWER-
UP
RECALL
Read & Write
Inhibited
(
RWI)
POWER-UP
RECALL
Read & Write
BROWN
OUT
Autostore
POWER-UP
RECALL
Read & Write
POWER
DOWN
Autostore
Note
18
Note
18
Note
21
Notes
17.t
HRECALL
starts from the time V
CC
rises above V
SWITCH.
18.If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware Store takes place.
19.On a Hardware STORE, Software STORE / RECALL, AutoStore Enable / Disable and AutoStore initiation, SRAM operation continues to be enabled for time t
DELAY
.
20.Read and Write cycles are ignored during STORE, RECALL, and while V
CC
is below V
SWITCH.
21.HSB pin is driven HIGH to V
CC
only by internal 100kOhm resistor, HSB driver is disabled.
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