2002 Oct 23 9
Philips Semiconductors Product specification
40 Msps, 10-bit analog-to-digital
interface for CCD cameras
TDA8783
t
hd2
hold time of IND compared to
control pulse SHD
see Fig.5 − 1 − ns
t
set(CDS)
CDS settling time see Fig.12; control DAC
4 bits input code;
AGC gain = 0 dB;
f
cut(AGC)
= 54 MHz;
V
i(CDS)
= 600 mV (p-p)
black-to-white transition in
1 pixel (±1 LSB typ.)
0000 − 8 − ns
0001 − 21 − ns
0010 − 42 − ns
0011 − 52 − ns
0100 − 82 − ns
0111 − 94 − ns
1000 − 195 − ns
1011 − 219 − ns
1111 − 280 − ns
Amplifier outputs
G
AMPOUT
output amplifier gain − 6 − dB
Z
AMPOUT
output amplifier impedance − 300 −Ω
V
AMPOUT(p-p)
output amplifier dynamic voltage
(peak-to-peak value)
− 2.4 − V
V
AMPOUT(bl)
output amplifier black level
voltage
− 1.5 − V
V
AGCOUT(p-p)
AGC output amplifier dynamic
voltage level (peak-to-peak value)
− 2000 − mV
V
AGCOUT(bl)
AGC output amplifier black level
voltage
V
ref
connected to DACOUT − V
ref
− V
Z
AGCOUT
AGC output amplifier output
impedance
at 10 kHz − 5 −Ω
I
AGCOUT
AGC output static drive current static −−1mA
G
AGC(min)
minimum gain of AGC circuit AGC DAC input code = 00
(9-bit control); see Fig.7
− 4.5 − dB
G
AGC(max)
maximum gain of AGC circuit AGC DAC input code ≥ 319
(9-bit control); see Fig.7
− 34.5 − dB
f
cut(AGC)
cut-off frequency AGC 4-bit control DAC
input code = 00 − 54 − MHz
input code = 15 − 4 − MHz
other codes see Fig.13
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
