Appendix D: Performance Verification
58
73A-270 Arbitrary Pulse/Pattern Generator Module
73A-270 Test Record
73A-270 Serial Number: Temperature and Relative Humidity:
Date of Last Calibration: Verification Performed by:
Certificate Number: Date of Verification:
VXIbus Interface Checks Logical Address, IEEE Address, Slot No., MFG., Model, etc.
Tab
C
and R
n
1st Response
2nd Response
3rd Response
4th Response
5th Response
Passed Failed
g
a
C
and R
n
1 MHz Pattern
Interrupt SRQ
TTL OUT A Checks Minimum Measured Value Maximum
T
Ba
R
u
n 100 ns ± 10 ns 90 ns 110 ns
1 ms ± 10 ns 99 ns 1.01 ms
10 ms ± 10 ns 9.99 ms 10.01 ms
100 ms ± 10 ns 99.99 ms 100.01 ms
u
Du
a
n Mu
1000 × 100 ns 4,999.5 Hz 5,000.5 Hz
100 × 1 ms 4,999.5 Hz 5,000.5 Hz
10 × 10 ms 4,999.5 Hz 5,000.5 Hz
1 × 100 ms 4,999.5 Hz 5,000.5 Hz
2 × 100 ms 2,499.75 Hz 2,500.25 Hz
5
5
5
±20 n
85.85848 ms 85.85852 ms
42
4242
±20 n
42.42418 ms 42.42422 ms
Passed Failed
Bu
a
n 42 × 1100 ms
21 × 1100 ms
TTL OUT B Checks Minimum Measured Value Maximum
T
Ba
R
u
n 100 ns ± 10 ns 90 ns 110 ns
1 ms ± 10 ns
99 ns 1.01 ms
10 ms ± 10 ns
9.99 ms 10.01 ms
100 ms ± 10 ns
99.99 ms 100.01 ms
