Architecture
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6.3.3 Breakpoint exception
• Cause
− Execution of a BREAK command.
• Exception mask
The Breakpoint exception is not maskable.
• Applicable instructions
BREAK
• Processing
− The common exception vector (0x8000 0080) is used.
− BP(9) is set for ExcCode in the Cause register.
− The EPC register points to the address of the instruction causing the exception. If, however, the
affected instruction was in the branch delay slot (for execution during a branch), the immediately
preceding branch instruction address is retained in the EPC register and the Cause register BD
bit is set to 1.
• Servicing
When a Breakpoint exception is raised, control is passed to the designated handling routine.
The unused bits of the BREAK instruction (bits 26 to 6) can be used to pass information to the
handler. When loading the BREAK instruction contents, the instruction pointed to by the EPC
register is loaded. Note that when the Cause register BD bit is set to 1 (when the BREAK
instruction is in the branch delay slot), it is necessary to add +4 to the EPC register value.
In returning from the exception handler, +4 must be added to the address in the EPC register to
avoid having the BREAK instruction executed again. If the Cause register BD bit is set to 1
(when the immediately preceding instruction was a branch instruction), the branch instruction
must be interpreted and set in the EPC register so that the return from the exception handler will
be made to the branch destination of the immediately preceding branch instruction.
