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Interrupt Service Procedures
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4. Interrupt Service Procedures
4.1 The Processor Interrupt Facility
The key to event-driven, real-time, multitasking systems is the processor's interrupt
facility. Tasks execute with the interrupt facility enabled permitting the system to
respond to a real-time event.
The hardware interrupt mechanism is an automatic facility provided by the processor.
AMX permits the system designer to determine how the hardware interrupt facility will
be employed.
Tasks must execute with the interrupt facility enabled.
From time to time, AMX must inhibit interrupts while it performs a critical, indivisible
sequence of operations. AMX keeps such intervals very short. For instance, even while
AMX is switching from one task to another, it is able to respond to interrupts.
To further improve interrupt response, AMX permits nesting of interrupts on processors
which support this feature. As soon as the interrupt request has been cleared, interrupts
can be enabled to permit response to other external events.
When an interrupt occurs, the processor disables the interrupt facility and stores the flags
and return address on the current stack to permit the processor to eventually resume the
interrupted process. In some cases, an internal or external interrupt mask is set to inhibit
new requests of priority less than or equal to the priority of the device being serviced.
Hardware external to the processor usually identifies the interrupt source. The processor
uses this identification to automatically fetch a unique device dependent pointer from the
processor vector table and branch to the address specified by that pointer. The program
located at that address is called an Interrupt Service Procedure (ISP).
In general, an ISP saves the registers it wishes to use, services the device, restores the
registers, enables the interrupt system and returns to the executing program at the point of
interruption.
If more than one device is connected to the same external interrupt source, your ISP must
determine the interrupt source in one of several ways. The simplest, but slowest, is a
software poll of the devices. The ISP tests each device sequentially to determine the
source of the interrupt and branches to a device service procedure to handle the specific
interrupt.
Alternatively, external hardware can be added to provide unique vectoring for each
device which can generate interrupts. If this approach is adopted, then a separate ISP
must be provided for each device.
The AMX Interrupt Supervisor simplifies ISP operation within the AMX multitasking
environment. The AMX Interrupt Supervisor permits an ISP to communicate with any
task in the system. The remainder of this chapter describes how ISPs are used within a
system.