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Interrupt Service Procedures
4.6 Non-Maskable Interrupt
The Intel 80x86 processor and equivalents provide a non-maskable interrupt (NMI). This
interrupt cannot be inhibited by software.
You have complete control over the non-maskable interrupt ISP. Usually, the NMI
interrupt is used to signal a catastrophic event such as a pending loss of power. The ISP
must process the interrupt in an application-dependent fashion, restore all registers and
return to the point of interruption if feasible. This ISP must assure that the interrupt
facility is restored according to its state at the time the non-maskable interrupt occurred.
The NMI ISP must be a nonconforming ISP. The NMI ISP cannot use AMX services.
Consequently the non-maskable interrupt cannot be used as an additional, general
purpose device interrupt.
Some hardware assisted debuggers may use the NMI interrupt to signal a breakpoint.
The AMX Breakpoint Manager can be used with such debuggers (see Chapter 13.6).
Warning
Because the occurrence of an NMI interrupt cannot be
controlled, the NMI interrupt can occur at any instant,
including within critical sections of AMX.
Consequently, the NMI ISP cannot call any AMX service
procedures.