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Interrupt Service Procedures
The Interrupt Service Procedure should be coded using assembly language if speed of
execution is critical.
EXTRN AAINT:FAR
EXTRN AAINX:FAR
;
DVC_CODE SEGMENT BYTE 'CODE'
;
PUBLIC DVCISP
; The ISP is located in user program memory
;
ASSUME CS:DVC_CODE
;
DVCISP PROC FAR
CALL AAINT ;let AMX know
:
:
Perform all device service.
All registers are free for use.
Interrupts may be enabled if nesting is supported.
:
:
If necessary, disable interrupts and clear the request in
one or more interrupt controllers (such as the Intel 8259).
CLI ; Disable interrupts
MOV AL,20H
OUT 20H,AL ; Non-specific EOI
CALL AAINX ;let AMX know
IRET ;return from interrupt
;
DVCISP ENDP
;
DVC_CODE ENDS
If the processor Interrupt Vector Table (IVT) is in RAM and AMX was launched with
vector access allowed, you can install the pointer to the ISP into the IVT using AMX
function AAIVTW. The ISP begins execution at address DVCISP. The ISP calls the AMX
Interrupt Supervisor (AAINT) to inform AMX that the interrupt has occurred.