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C141-E124-01EN 4 - 25
"1" : This enables the write cache.
Write data remains in the buffer memory, the cache is made the object even for a read
command, and when all of the write data has been received, "GOOD" status is reported
without disconnecting.
Sequential writing is performed without waiting for rotation.
"0" : This prohibits operation of the write cache function.
Write data remains in the buffer memory, the cache is not made the object even for a read
command, and as soon as all the data has been written to the disk, "GOOD" status is reported.
d. SIZE (size enable) (not supported)
"1" : Divides the data buffer in accordance with the value specified for the cache segment size
(bytes 14, 15).
"0" : Divides the data buffer in accordance with the value specified for the number of cache
segments (byte 13).
This bit cannot be changed. The IDD disregards the specification in this bit and operates
according to the "Default" value (= "0").
e. DISC (discontinuity)
"1" : Even if a track switch occurs during Look-Ahead, the Look-Ahead operation continues
without interruption.
"0" : Look-Ahead is terminated at the point where track switch occurs during Look-Ahead.
This bit cannot be changed. The IDD disregards the specification in this bit and operates
according to the "Default" value (= "0").
f. IC (initiator control enable)
"1" : Dividing of cache segments is according to the SIZE bit specification.
"0" : Dividing of the cache segments is performed by an algorithm that is inherent in the IDD.
This bit can be changed, and its operation is as specified.
g. Demand Read Retention Priority (not supported)
This field advises the device server the retention priority to assign for data read into the cache
that has also been transferred from the logical unit to the application client.
The IDD are not supported this field. Thus, the IDD disregards the specification in this field.