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FPC 8084 Users Manual
A.2.3 Advanced Chipset Features
Since the features in this section are related to the chipset on the
CPU board and are completely optimized, changing the default
settings in this setup table are not recommended unless the user is
well oriented with the chipset features.
Phoenix – Award BIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing By SPD Enabled Item Help
X DRAM Clock Host CLK
X S DRAM Cycle Length 3 Menu Leve l
f
X Bank Inte rleave Di s a bled
Memory Hole Disabled
P2C/C2P Concurrency Enabled
System BIOS Cacheable Disabled
Video RAM Cacheable Disabled
Frame Buffer Size 16MAGP
Aperture Size 64M
AGP-4X Mode Enabled
AGP Dr iving Control AutoAGP
Dr iving Value DA
OnChip USB Enabled
USB Keyboard S upport Disabled
OnChip Sound Auto
OnChip Modem Disabled
CPU to PCI Write Buffer Enabled
P CI Dynamic Bu rsting Enabled
PCI Master 0 WS Write Enabled
PCI Delay Transaction Disabled
PCI# 2 Access #1 Retry Enabled
AGP Master 1 WS Write Disabled
AGP Master 1 WS Read Disa bled
ÇÈ
ÆÅ
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1:
General Help
F5 : Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
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