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FPC 8084 Users Manual
USB Keyboard Support
Select
“
Enabled
if the system contains a Universal Serial Bus (USB)
controller and you have a USB keyboard.
The choice: Enabled, Disabled.
CPU to PCI Write Buffer
When this field is
Enabled
, writes from the CPU to the PCI bus are
buffered to compensate for the speed differences between the CPU and
the PCI bus. When
“
Disabled
, the writes are not buffered and the CPU
must wait until the write is complete before starting another write cycle.
PCI Dynamic Bursting
This item is to enable/ disable the PCI dynamic bursting function.
PCI Master 0 WS Write
When
Enabled
, writes to the PCI bus are executed with zero wait
states.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select
Enabled
to support compliance with PCI
specification version 2.1. The default setting is
Disabled
.
PCI#2 Access #1 Retry
When
Disabled
, PCI#2 will not be disconnected until access finishes
(default). When
Enabled
, PCI#2 will be disconnected if max retries
are attempted without success.
AGP Master 1 WS Write
When
Enabled
, writes to the AGP (Accelerated Graphics Port) are
executed with one wait states.
AGP Master 1 WS Read
When
Enabled
, read to the AGP (Accelerated Graphics Port) are
executed with one wait states.
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