Cypress CY4672 Espresso Maker User Manual


 
38 CY4672 Reference Design Guide, Document # 001-16968 Revision **
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3.3.2.1 Global Configuration
Following is a description of the Global Resources that are configured for the CYRF69103 PRoC
LP Programmable Radio on Chip. Care must be taken when modifying these values as they affect
the user modules discussed below.
3.3.2.1.1 CPU Clock
This parameter is set to Internal (24 MHz). In order to run the CPU at 12 MHz, CPU Clock/N needs
to be set to ‘2’. This operating frequency provides for faster code execution so that when events are
detected the microcontroller can be put back into the sleep state quicker for improved power sav-
ings.
3.3.2.1.2 CPU Clock / N
This parameter is set to ‘2’ to provide a 12 MHz clock.
3.3.2.1.3 Timer Clock
This parameter is set to FreeRun Timer.
3.3.2.1.4 Timer Clock /N
This parameter is set to ‘4’.
3.3.2.1.5 FreeRun Timer
This parameter is set to Low Power (32 kHz).
3.3.2.1.6 FreeRun Timer /N
This parameter is set to ‘6’.
3.3.2.1.7 Capture Edge
This parameter is set to Latest.
3.3.2.1.8 8 Bit Capture Prescaler
This parameter is set to ‘1’.
3.3.2.1.9 CLKOUT Source
This parameter is set to Internal (24 MHz).
3.3.2.1.10 Low V Detect
This parameter is set to 2.63V–2.68V.
3.3.2.1.11 V Reset
This parameter is set to 2.6V.
3.3.2.1.12 Watchdog Enable
This parameter should be set to Enable, but may be set to Disable for debug purposes.
3.3.2.2 SPI Master User Module
The SPI Master User Module is used to communicate with both the radio transceiver and the optical
sensor. Both devices support leading edge data latching, non-inverted clock and MSB first transmis-
sion as defaults. A clock divisor of 12 is chosen which generates an SPI clock of 1 MHz. The inter-
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