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Chapter 2 69
Status Registers
Use Status Registers to Determine the State of Analyzer Events and Conditions
Figure 2-6 Standard Event Status Register Diagram
The standard event status register contains the following bits:
+
To Status Byte Register Bit #5
&
&
&
&
&
&
&
&
Request Bus Control
Operation Complete
Query Error
Device Dependent Error
Execution Error
Command Error
User Request
Event Register
Event
Enable Register
Power On
ck723a
01234567
01234567
Bit Decimal
Value
Description
01Operation Complete: A 1 in this bit position indicates that all
operations were completed following execution of the *OPC
command.
12Request Bus Control: This bit is always set to 0. (The
analyzer does not request control.)
24Query Error: A 1 in this bit position indicates that a query error
has occurred. Query errors have SCPI error numbers from −499 to
–400.
38Device Dependent Error: A 1 in this bit position indicates
that a device dependent error has occurred. Device dependent
errors have SCPI error numbers from –399 to –300 and 1 to
32767.
416Execution Error: A 1 in this bit position indicates that an
execution error has occurred. Execution errors have SCPI error
numbers from –299 to –200.