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ESAI Programming Model
DSP56364 24-Bit Digital Signal Processor Users Manual, Rev. 2
6-40 Freescale Semiconductor
Figure 6-14 ESAI Data Path Programming Model ([R/T]SHFD=1)
SDI
23 16 15 8 7 0
707070
RECEIVE HIGH BYTE RECEIVE MIDDLE BYTE RECEIVE LOW BYTE
ESAI RECEIVE DATA REGISTER
(READ ONLY)
ESAI RECEIVE
SHIFT REGISTER
23 16 15 8 7 0
707070
RECEIVE HIGH BYTE RECEIVE MIDDLE BYTE RECEIVE LOW BYTE
24-BIT DATA
00
16-BIT DATA
12-BIT DATA
8-BIT DATA
LSB
LSB
LSB
LSBMSB
MSB
MSB
MSB
LEAST SIGNIFICANT
ZERO FILL
NOTES:
1. Data is received LSB first if RSHFD=1.
2. 24-bit fractional format (ALC=0).
3. 32-bit mode is not shown.
(a) Receive Registers
SDO
23 16 15 8 7 0
707070
TRANSMIT HIGH BYTE TRANSMIT MIDDLE BYTE TRANSMIT LOW BYTE
ESAI TRANSMIT DATA
REGISTER
(WRITE ONLY)
ESAI TRANSMIT
SHIFT REGISTER
23 16 15 8 7 0
707070
TRANSMIT HIGH BYTE TRANSMIT MIDDLE BYTE TRANSMIT LOW BYTE
24 BIT
TSWS4-
TSWS0
24-BIT DATA
00
16-BIT DATA
12-BIT DATA
8-BIT DATA
LSB
LSB
LSB
LSBMSB
MSB
MSB
MSB
NOTES:
1. Data is sent LSB first if TSHFD=1.
2. 24-bit fractional format (ALC=0).
3. 32-bit mode is not shown.
4. Data word is left aligned (TWA=0,PADC=1).
16 BIT
12 BIT
8 BIT
(b) Transmit Registers
00
20-BIT DATA
LSB
MSB
20 BIT
LSB
MSB
20-BIT DATA
00