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DSP56364 24-Bit Digital Signal Processor Users Manual, Rev. 2
Freescale Semiconductor 6-45
NOTE
If the ESAI receiver section is already operating with some of the receivers,
enabling additional receivers on the fly (i.e. without first putting the ESAI
receiver in the personal reset state) by setting their REx control bits will
result in erroneous data being received as the first data word for the newly
enabled receivers.
6.4.3 ESAI Interrupt Requests
The ESAI can generate eight different interrupt requests (ordered from the highest to the lowest priority):
1. ESAI Receive Data with Exception Status.
Occurs when the receive exception interrupt is enabled (REIE=1 in the RCR register), at least one
of the enabled receive data registers is full (RDF=1), and a receiver overrun error has occurred
(ROE=1 in the SAISR register). ROE is cleared by first reading the SAISR and then reading all the
enabled receive data registers.
2. ESAI Receive Even Data
Occurs when the receive even slot data interrupt is enabled (REDIE=1), at least one of the enabled
receive data registers is full (RDF=1), the data is from an even slot (REDF=1), and no exception
has occurred (ROE=0 or REIE=0).
Reading all enabled receiver data registers clears RDF and REDF.
3. ESAI Receive Data
Occurs when the receive interrupt is enabled (RIE=1), at least one of the enabled receive data
registers is full (RDF=1), no exception has occurred (ROE=0 or REIE=0), and no even slot
interrupt has occurred (REDF=0 or REDIE=0).
Reading all enabled receiver data registers clears RDF.
4. ESAI Receive Last Slot Interrupt
Occurs, if enabled (RLIE=1), after the last slot of the frame ended (in network mode only)
regardless of the receive mask register setting. The receive last slot interrupt may be used for
resetting the receive mask slot register, reconfiguring the DMA channels and reassigning data
memory pointers. Using the receive last slot interrupt guarantees that the previous frame was
serviced with the previous setting and the new frame is serviced with the new setting without
synchronization problems. Note that the maximum receive last slot interrupt service time should
not exceed N-1 ESAI bits service time (where N is the number of bits in a slot).
5. ESAI Transmit Data with Exception Status
Occurs when the transmit exception interrupt is enabled (TEIE=1), at least one transmit data
register of the enabled transmitters is empty (TDE=1), and a transmitter underrun error has
occurred (TUE=1). TUE is cleared by first reading the SAISR and then writing to all the enabled
transmit data registers, or to the TSR register.
6. ESAI Transmit Last Slot Interrupt
Occurs, if enabled (TLIE=1), at the start of the last slot of the frame in network mode regardless of
the transmit mask register setting. The transmit last slot interrupt may be used for resetting the
transmit mask slot register, reconfiguring the DMA channels and reassigning data memory
pointers. Using the transmit last slot interrupt guarantees that the previous frame was serviced with