Freescale Semiconductor DSP56364 Bread Maker User Manual


 
Memory Space Configuration
DSP56364 24-Bit Digital Signal Processor Users Manual, Rev. 2
Freescale Semiconductor 3-3
3.1.2.2 X Data RAM
The on-chip X data RAM consists of 24-bit wide, high-speed, internal static RAM occupying 1K locations
in the X memory space. The X data RAM organization is 4 banks of 256 24-bit words.
3.1.2.3 Y Data Memory Space
The off-chip peripheral registers should be mapped into the top 128 locations of Y data memory
($FFFF80–$FFFFFF in the 24-bit address mode or $FF80–$FFFF in the 16-bit address mode) to take
advantage of the move peripheral data (MOVEP) instruction and the bit oriented instructions (BCHG,
BCLR, BSET, BTST, BRCLR, BRSET, BSCLR, BSSET, JCLR, JSET, JSCLR, and JSSET).
The reserved Y memory space from $FF0000 to $FFEFFF should not be accessed.
3.1.2.4 Y Data RAM
The on-chip Y data RAM consists of 24-bit wide, high-speed, internal static RAM occupying 1.5K
(default) or 0.75K locations in the Y memory space. The size of the Y data RAM is dependent on the
setting of the MS bit (default: MS is cleared). The Y data RAM default organization is 6 banks of 256
24-bit words. Three banks of RAM may be switched to program RAM by setting the MS bit.
3.2 Memory Space Configuration
Memory space addressing is for 24-bit words by default. The DSP56364 switches to 16-bit address
compatibility mode by setting the 16-bit compatibility (SC) bit in the SR.
Accessible external memory in the 24-bit mode is limited to a maximum of 512K when using the SRAM
operating mode and to 16M when using the DRAM operating mode.
Memory maps for the different configurations are shown in Figure 3-1 to Figure 3-4.
3.3 Internal Memory Configuration
The following subsections discuss the internal memory configuration of the DSP56364. The size and
location configurations for RAM and ROM for the DSP56364 are given below.
Table 3-1 Memory Space Configuration Bit Settings for the DSP56364
Bit Abbreviation Bit Name Bit Location
Cleared = 0 Effect
(Default)
Set = 1 Effect
SC 16-bit Compatibility SR 13 16 M word address space
(24-bit word)
64 K word address space
(16-bit word)