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Operating Mode Register (OMR)
DSP56364 24-Bit Digital Signal Processor Users Manual, Rev. 2
4-2 Freescale Semiconductor
4.2.1 Mode C (MC) - Bit 2
The Mode C (MC) bit is set during hardware reset and should be left set in the DSP56364.
4.2.2 Address Attribute Priority Disable (APD) - Bit 14
The Address Attribute Priority Disable (APD) bit is used to turn off the address attribute priority
mechanism. When this bit is set, more than one address attribute pin AA/RAS
(1:0) may be simultaneously
asserted according to its AAR settings. The APD bit is cleared by hardware reset.
4.2.3 Address Tracing Enable (ATE) - Bit 15
The Address Tracing Enable (ATE) bit is used to turn on Address Tracing (AT) Mode. When the AT Mode
is enabled, the DSP56300 Core reflects the addresses of internal fetches and program space moves
(MOVEM) to the Address Bus (A0-A17), if the Address Bus is not needed by the DSP56300 Core for
external accesses. The ATE bit is cleared on hardware reset.
SCS EOM COM
23222120191817161514131211109876543210
SEN
WRP
EOV
EUN
XYS
ATE
APD
TAS
CDP1:0
MS
SD
EBD
MD
MC
MB
MA
ATE - Address Tracing Enable MS - Memory Switch Mode
APD - Address Priority Disable SD - Stop Delay
SEN - Stack Extension Enable EBD - External Bus Disable
WRP - Extended Stack Wrap Flag TAS - TA Synchronize Select MD - Operating Mode D
EOV - Extended Stack Overflow
Flag
MC - Operating Mode C - Always
set.
EUN - Extended Stack Underflow
Flag
CDP1 - Core-Dma Priority 1 MB - Operating Mode B
XYS - Stack Extension Space
Select
CDP0 - Core-Dma Priority 0 MA - Operating Mode A
- Reserved bit. Read as zero, should be written with zero for future compatibility
Figure 4-1 Operating Mode Register (OMR)