Intel IXP400 Frozen Dessert Maker User Manual


 
Intel
®
IXP400 Software
Contents
April 2005 IXP400 Software Version 2.0 Programmer’s Guide
12 Document Number: 252539, Revision: 007
24.4.1 Backward Compatibility Module...........................................................................316
24.4.2 Buffer Translation Module....................................................................................316
24.5 OSAL Library Structure.....................................................................................................316
24.6 OSAL Modules and Related Interfaces ............................................................................ 319
24.6.1 Core Module ........................................................................................................319
24.6.2 Buffer Management Module ................................................................................ 322
24.6.3 I/O Memory and Endianness Support Module.....................................................322
24.7 Supporting a New OS.......................................................................................................324
24.8 Supporting New Platforms................................................................................................325
25 ADSL Driver ...............................................................................................................................327
25.1 What’s New.......................................................................................................................327
25.2 Device Support .................................................................................................................327
25.3 ADSL Driver Overview......................................................................................................327
25.3.1 Controlling STMicroelectronics* ADSL Modem Chipset Through CTRL-E..........328
25.4 ADSL API..........................................................................................................................328
25.5 ADSL Line Open/Close Overview..................................................................................... 328
25.6 Limitations and Constraints ..............................................................................................330
26 I
2
C Driver (IxI2cDrv)...................................................................................................................331
26.1 What’s New.......................................................................................................................331
26.2 Introduction.......................................................................................................................331
26.3 I
2
C Driver API Details .......................................................................................................331
26.3.1 Features...............................................................................................................331
26.3.2 Dependencies......................................................................................................332
26.3.3 Error Handling......................................................................................................333
26.3.3.1 Arbitration Loss Error........................................................................... 333
26.3.3.2 Bus Error..............................................................................................334
26.4 I
2
C Driver API Usage Models ...........................................................................................334
26.4.1 Initialization and General Data Model..................................................................334
26.4.2 Example Sequence Flows for Slave Mode..........................................................336
26.4.3 I
2
C Using GPIO Versus Dedicated I
2
C Hardware ...............................................339
27 Endianness in Intel
®
IXP400 Software.....................................................................................341
27.1 Overview...........................................................................................................................341
27.2 The Basics of Endianness ................................................................................................341
27.2.1 The Nature of Endianness: Hardware or Software? ............................................342
27.2.2 Endianness When Memory is Shared .................................................................342
27.3 Software Considerations and Implications........................................................................343
27.3.1 Coding Pitfalls — Little-Endian/Big-Endian..........................................................343
27.3.1.1 Casting a Pointer Between Types of Different Sizes ...........................343
27.3.1.2 Network Stacks and Protocols............................................................. 344
27.3.1.3 Shared Data Example: LE Re-Ordering Data for BE Network Traffic..344
27.3.2 Best Practices in Coding of Endian-Independence .............................................345
27.3.3 Macro Examples: Endian Conversion..................................................................345
27.3.3.1 Macro Source Code.............................................................................345
27.4 Endianness Features of the Intel
®
IXP4XX
Product Line of Network Processors
and IXC1100 Control Plane Processor.............................................................................346
27.4.1 Supporting Little-Endian Mode ............................................................................348
27.4.2 Reasons for Choosing a Particular LE Coherency Mode ....................................348