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IXP400 Software
Contents
Programmer’s Guide IXP400 Software Version 2.0 April 2005
Document Number: 252539, Revision: 007
77 Data Abort with No Parity Error ................................................................................................243
78 Parity Error with No Data Abort ................................................................................................243
79 Data Abort followed by Unrelated Parity Error Notification.......................................................244
80 Unrelated Parity Error Followed by Data Abort.........................................................................244
81 Data Abort Caused by Parity Error ...........................................................................................245
82 Parity Error Notification Followed by Related Data Abort .........................................................245
83 Data Abort with both Related and Unrelated Parity Errors .......................................................246
84 IxPerfProfAcc Dependencies....................................................................................................251
85 IxPerfProfAcc Component API .................................................................................................253
86 Display Performance Counters.................................................................................................255
87 Display Clock Counter ..............................................................................................................256
88 Display Xcycle Measurement ...................................................................................................264
89 AQM Hardware Block ...............................................................................................................266
90 Dispatcher in Context of an Interrupt........................................................................................271
91 Dispatcher in Context of a Polling Mechanism .........................................................................272
92 IxSspAcc Dependencies...........................................................................................................276
93 Interrupt Scenario .....................................................................................................................279
94 Polling Scenario........................................................................................................................281
95 IxTimeSyncAcc Component Dependencies .............................................................................284
96 Block Diagram of Intel
®
IXP46X Network Processor................................................................286
97 Polling for Timestamps of Sync or Delay_Req .........................................................................290
98 Interrupt Servicing of Target Time Reached Condition.............................................................291
99 Polling for Auxiliary Snapshot Values.......................................................................................292
100 UART Services Models.............................................................................................................295
101 USBSetupPacket......................................................................................................................303
102 STALL on IN Transactions........................................................................................................305
103 STALL on OUT Transactions....................................................................................................306
104 USB Dependencies ..................................................................................................................308
105 OSAL Architecture...................................................................................................................314
106 OSAL Directory Structure .........................................................................................................318
107 STMicroelectronics* ADSL Chipset
on the Intel
®
IXDP425 / IXCDP1100 Development Platform....................................................328
108 Example of ADSL Line Open Call Sequence ...........................................................................329
109 I
2
C Driver Dependencies..........................................................................................................333
110 Sequence Flow Diagram for Slave Receive / General Call in Interrupt Mode..........................336
111 Sequence Flow Diagram for Slave Transmit in Interrupt Mode................................................337
112 Sequence Flow Diagram for Slave Receive in Polling Mode....................................................338
113 Sequence Flow Diagram for Slave Transmit in Polling Mode...................................................339
114 32-Bit Formats ..........................................................................................................................342
115 Endianness in Big-Endian-Only Software Release...................................................................347
116 Intel
®
IXP4XX Product Line of Network Processors and IXC1100
Control Plane Processor Endianness Controls.........................................................................350
117 Ethernet Frame (Big-Endian)....................................................................................................357
118 One Half-Word-Aligned Ethernet Frame (LE Address Coherent).............................................358
119 Intel XScale
®
Core Read of IP Header (LE Data Coherent).....................................................359
120 VxWorks* Data Coherent Swap Code......................................................................................363
Tables
1 Internal IX_MBUF Field Format..................................................................................................44