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IXP400 Software
Endianness in Intel
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IXP400 Software
Programmer’s Guide IXP400 Software Version 2.0 April 2005
Document Number: 252539, Revision: 007 349
When the Intel XScale core is in Little-Endian Address Coherent mode, words written by the Intel
XScale core are in the same format when read by the NPE as words. However, byte accesses
appear reversed and half-word accesses return the other half-word of the word. The benefit of this
mode is that if the Intel XScale core is writing a 32-bit address to memory, the NPE could read that
address correctly without having to do any conversion. Additionally, LE Address Coherent
instructions are in the same format as they would be for Big-Endian operation. The same program
image could be used for Big- and Little-Endian modes because instructions are the same from the
point of view of the Intel XScale core.
When the Intel XScale core is in Little-Endian Data Coherent mode, bytes written by the Intel
XScale core are in the same format when read as bytes by the NPE. However, the bytes within a
word and half-word appear reversed. This endian conversion method is beneficial when data is
written and read as bytes. Additionally, many commercially available software protocol stacks
were written to support both Big- and Little-Endian modes. These stacks assume a Data Coherent
endian conversion and provide all the necessary byte swapping to correct words and half-words.
By providing both types of endian conversion through the use of the P-attribute bit in the MMU,
the software has the flexibility to use whichever method is most convenient for the particular task.
27.4.3 Silicon Endianness Controls
27.4.3.1 Hardware Switches
There are many hardware endianness controls available to the software. However, the following
four are the most important and play a significant role in the operation of software.
• Intel XScale core BE/LE mode
• Expansion Bus Control Register 1: BYTE_SWAP_EN bit.
• MMU Page table “P” attribute bit.
• PCI Bus swapping control
The default operation of the IXP4XX product line and IXC1100 control plane processors on reset
is: Intel XScale core Little-Endian, Address Coherent, MMU-disabled.