Intel IXP400 Frozen Dessert Maker User Manual


 
Intel
®
IXP400 Software
Access-Layer Components: ATM Transmit Scheduler (IxAtmSch) API
Programmer’s Guide IXP400 Software Version 2.0 April 2005
Document Number: 252539, Revision: 007 85
Some function interfaces supplied by the IXP400 software component adhere to structure
requirements specified by the IxAtmdAcc component. However, no explicit dependency exists
between the IxAtmSch component and the IxAtmdAcc component.
6.7 Error Handling
IxAtmSch returns an error type to the user when the client is expected to handle the error. Internal
errors will be reported using standard processor error-reporting techniques.
6.8 Memory Requirements
Memory estimates have been sub-divided into two main areas: performance critical and not
performance critical.
6.8.1 Code Size
The ixAtmSch code size is approximately 35 Kbytes.
6.8.2 Data Memory
There are a maximum of 32 VCs per port and eight ports supported by the IxAtmSch component.
These multipliers are used in Table 10.
6.9 Performance
The key performance measure for the IxAtmSch component is the rate at which it can generate the
schedule table, measured by time per cell. The rate at which queue updates are performed is also
important. As this second situation will happen less frequently, however — because a great many
cells may be queued in one call to the update function — it is of secondary importance.
The remaining functionality provided by the IxAtmSch is infrequent in nature, being used to
initialize or modify the configuration of the component. This situation is not performance-critical
as it does not affect the data path of the IXP42X product line processors.
Table 10. IxAtmSch Data Memory Usage
Per VC Data Per Port Data Total
Performance Critical Data 36 44 + (32 * 36) = 1,196 9,568
Non Critical Data 40 12 + (40 * 32) = 192 10,336
Total 76 2,488 19,904