Intel IXP400 Frozen Dessert Maker User Manual


 
Intel
®
IXP400 Software
Contents
April 2005 IXP400 Software Version 2.0 Programmer’s Guide
4 Document Number: 252539, Revision: 007
4.5.1 Scheduled Transmission .......................................................................................58
4.5.1.1 Schedule Table Description................................................................... 59
4.5.2 Transmission Triggers (Tx-Low Notification) ......................................................... 60
4.5.2.1 Transmit-Done Processing ....................................................................60
4.5.2.2 Transmit Disconnect ..............................................................................62
4.5.3 Receive Services...................................................................................................63
4.5.3.1 Receive Triggers (Rx-Free-Low Notification).........................................64
4.5.3.2 Receive Processing ...............................................................................64
4.5.3.3 Receive Disconnect ...............................................................................66
4.5.4 Buffer Management ............................................................................................... 67
4.5.4.1 Buffer Allocation..................................................................................... 67
4.5.4.2 Buffer Contents......................................................................................67
4.5.4.3 Buffer-Size Constraints..........................................................................69
4.5.4.4 Buffer-Chaining Constraints...................................................................69
4.5.5 Error Handling........................................................................................................ 69
4.5.5.1 API-Usage Errors...................................................................................69
4.5.5.2 Real-Time Errors.................................................................................... 70
5 Access-Layer Components:
ATM Manager (IxAtmm) API .......................................................................................................71
5.1 What’s New......................................................................................................................... 71
5.2 IxAtmm Overview................................................................................................................71
5.3 IxAtmm Component Features............................................................................................. 71
5.4 UTOPIA Level-2 Port Initialization ......................................................................................72
5.5 ATM-Port Management Service Model...............................................................................73
5.6 Tx/Rx Control Configuration ...............................................................................................75
5.7 Dependencies.....................................................................................................................77
5.8 Error Handling.....................................................................................................................77
5.9 Management Interfaces......................................................................................................77
5.10 Memory Requirements .......................................................................................................77
5.11 Performance .......................................................................................................................78
6 Access-Layer Components:
ATM Transmit Scheduler (IxAtmSch) API .................................................................................79
6.1 What’s New......................................................................................................................... 79
6.2 Overview............................................................................................................................. 79
6.3 IxAtmSch Component Features..........................................................................................79
6.4 Connection Admission Control (CAC) Function.................................................................. 81
6.5 Scheduling and Traffic Shaping..........................................................................................82
6.5.1 Schedule Table...................................................................................................... 82
6.5.1.1 Minimum Cells Value (minCellsToSchedule)......................................... 83
6.5.1.2 Maximum Cells Value (maxCells).......................................................... 83
6.5.2 Schedule Service Model........................................................................................83
6.5.3 Timing and Idle Cells ............................................................................................. 84
6.6 Dependencies.....................................................................................................................84
6.7 Error Handling.....................................................................................................................85
6.8 Memory Requirements .......................................................................................................85
6.8.1 Code Size .............................................................................................................. 85
6.8.2 Data Memory ......................................................................................................... 85
6.9 Performance .......................................................................................................................85
6.9.1 Latency ..................................................................................................................86