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IXP400 Software
Access-Layer Components: Time Sync (IxTimeSyncAcc) API
Programmer’s Guide IXP400 Software Version 2.0 April 2005
Document Number: 252539, Revision: 007 285
synchronization, and internal processing delays. The slave element/node, after detecting the
Sync
or
Follow_Up message, will begin the process to synchronize its system clock based on the master
clock timestamp.
The slave may also initiate an synchronization request by sending a
Delay_Req message with its
local system time as the timestamp to the master. The master will then respond with
Delay_Resp,
carrying both the timestamp at which the
Delay_Req was received and the timestamp included by
the slave in the
Delay_Req message. This allows the slave to determine the transit delay and
accordingly to update its system time.
20.2.2 IEEE 1588 Hardware Assist Block
Overview
The hardware provides necessary features to allow timestamping of the IEEE 1588 PTP messages.
The IEEE 1588 Hardware Assist block internally snoops the MII interfaces that extend from the
NPE components on the processor to Ethernet PHYs populated on the development or customer
board. This provides the IEEE 1588 Hardware Assist block with the capability to detect the
transversal of PTP protocol messages between the PHY and the MAC, and set internal timestamp
registers with the appropriate data from these messages. When the timestamps of inbound or
outbound messages are read by the hardware, the hardware block stores this information in a
register.
The IEEE 1588 Hardware Assist block maintains a system time, which can be adjusted via API by
the client application. Additionally, the block can be configured to interrupt the client application if
the system time exceeds a specified target value.
Although IEEE 1588 PTP can be used for time synchronization of network elements/nodes over
various communication media, this IEEE 1588 Hardware Assist block is designed to detect PTP
messages over the NPE Ethernet interfaces only (not over the PCI interface).