Intel IXP400 Frozen Dessert Maker User Manual


 
Intel
®
IXP400 Software
Contents
April 2005 IXP400 Software Version 2.0 Programmer’s Guide
16 Document Number: 252539, Revision: 007
2 IX_MBUF Field Details ...............................................................................................................45
3 IX_MBUF to M_BLK Mapping .................................................................................................... 47
4 Buffer Translation Functions.......................................................................................................48
5 IXP_BUF Fields Required for Transmission..............................................................................68
6 IXP_BUF Fields of Available Buffers for Reception....................................................................68
7 IXP_BUF Fields Modified During Reception............................................................................... 68
8 Real-Time Errors ........................................................................................................................ 70
9 Supported Traffic Types .............................................................................................................80
10 IxAtmSch Data Memory Usage ..................................................................................................85
11 IxCryptoAcc Data Memory Usage .............................................................................................. 93
12 Supported Encryption Algorithms .............................................................................................111
13 Supported Authentication Algorithms .......................................................................................113
14 DMA Modes Supported for Addressing Mode of Incremental Source Address and
Incremental Destination Address..............................................................................................121
15 DMA Modes Supported for Addressing Mode of Incremental Source Address and
Fixed Destination Address........................................................................................................122
16 DMA Modes Supported for Addressing Mode of Fixed Source Address and
Incremental Destination Address..............................................................................................123
17 IX_OSAL_MBUF Structure Format ..........................................................................................148
18 ixp_ne_flags Field Format ........................................................................................................ 148
19 IX_OSAL_MBUF Header Definitions for the Ethernet Subsystem ...........................................149
20 IX_OSAL_MBUF “Port ID” Field Format...................................................................................151
21 IX_OSAL_MBUF “Port ID” Field Values ...................................................................................152
22 ixp_ne_flags.link_prot Field Values ..........................................................................................152
23 Managed Objects for Ethernet Receive....................................................................................153
24 Managed Objects for Ethernet Transmit...................................................................................154
25 Untagged MAC Frame Format .................................................................................................163
26 VLAN Tagged MAC Frame Format ..........................................................................................163
27 VLAN Tag Format.....................................................................................................................164
28 Egress VLAN Tagging/Untagging Behavior Matrix...................................................................168
29 Default Priority to Traffic Class Mapping ..................................................................................172
30 IEEE802.11 Frame Format.......................................................................................................172
31 IEEE802.11 Frame Control (FC) Field Format .........................................................................173
32 802.3 to 802.11 Header Conversion Rules ..............................................................................175
33 802.11 to 802.3 Header Conversion Rules ..............................................................................176
34 IxEthDB Feature Set.................................................................................................................178
35 PHYs Supported by IxEthMii ....................................................................................................182
36 Product ID Values.....................................................................................................................184
37 Feature Control Register Values ..............................................................................................185
38 HSS Tx Clock Output frequencies and PPM Error ...................................................................193
39 HSS TX Clock Output Frequencies and Associated Jitter Characterization ............................193
40 Jitter Definitions ........................................................................................................................194
41 HSS Frame Output Characterization........................................................................................194
42 NPE-A Images..........................................................................................................................221
43 NPE-B Images..........................................................................................................................222
44 NPE-C Images..........................................................................................................................222
45 Parity Error Interrupts ...............................................................................................................236
46 Parity Capabilities Supported by IxParityENAcc ......................................................................237
47 Parity Error Interrupt Deassertion Conditions........................................................................... 240
48 AQM Configuration Attributes..................................................................................................268