Intel IXP400 Frozen Dessert Maker User Manual


 
Intel
®
IXP400 Software
Access-Layer Components: ATM Manager (IxAtmm) API
April 2005 IXP400 Software Version 2.0 Programmer’s Guide
72 Document Number: 252539, Revision: 007
IxAtmm assumes that the client will supply initial upstream port rates once the capacity of
each port is established.
Ensuring traffic shaping is performed for each registered port.
IxAtmm acts as transmission control for a port by ensuring cell demand is communicated to
the IxAtmSch ATM Scheduler from IxAtmdAcc and cell transmission schedules produced by
IxAtmSch are supplied at a sufficient rate to IxAtmdAcc component.
Determining the policy for processing transmission buffers recycled from the hardware.
In the IXP400 software, the component will ensure this processing is done on an event-driven
basis. That is, a notification of threshold number of outstanding recycled buffers will trigger
processing of the recycled buffers.
Controlling the processing of receive buffers via IxAtmdAcc.
IxAtmdAcc supports two incoming Rx buffer streams termed high- and low-priority streams.
The high-priority stream will be serviced in an event-driven manner. For example, as soon
a buffer is available in the stream, it will be serviced.
The low-priority stream will be serviced on a timer basis.
Allowing clients to register VCCs (Virtual Channel Connections) on all serving ATM ports for
transmitting and/or receiving ATM cells.
IxAtmm will check the validity (type of service, traffic descriptor, etc.) of the registration
request and will reject any request that presents invalid traffic parameters. IxAtmm does not
have the capability to signal, negotiate, and obtain network admission of a connection. The
client will make certain that the network has already admitted the requested connection before
registering a connection with IxAtmm.
IxAtmm also may reject a connection registration that exceeds the port capacity on a first-
come-first-serve basis, regardless of whether the connection has already been admitted by the
network.
Enabling query for the ATM port and registered VCC information on the port.
Allowing the client to modify the port rate of any registered port after initialization.
5.4 UTOPIA Level-2 Port Initialization
IxAtmm is responsible for the initial configuration of the IXP4XX product line and IXC1100
control plane processors’ UTOPIA Level-2 device. This is performed through a user interface that
will facilitate specification of UTOPIA-specific parameters to the IxAtmm component.
IxAtmm supports up to eight logical ports over the UTOPIA interface.
The data required for each port to configure the UTOPIA device is the five-bit address of the
transmit and receive PHY interfaces on the UTOPIA bus.
The UTOPIA device can also be initialized in loop-back mode. Loop-back is only supported,
however, in a single-port configuration.
All other UTOPIA configuration parameters are configured to a static state by the IxAtmm and are
not configurable through the functional interface of this component. Clients that wish a greater
level of control over the UTOPIA device should modify and recompile the IxAtmm component
with the new static configuration. Alternately, they can use the interface provided by the
IxAtmdAcc component.