Intel IXP400 Frozen Dessert Maker User Manual


 
Intel
®
IXP400 Software
Access-Layer Components: Performance Profiling (IxPerfProfAcc) API
April 2005 IXP400 Software Version 2.0 Programmer’s Guide
254 Document Number: 252539, Revision: 007
The number of events that can be monitored simultaneously range from zero to four at a time.
When the number of event to monitor is set to 0, only clock counting is performed. The clock count
can be set to be incremented by one at each 64th processor clock cycle or at every processor clock
cycle.
The steps needed to run this utility are:
1. To begin the clock and event counting, call the start function with parameters:
BOOL [in] clkCntDiv — Enables/disables the clock divider. When true, the divider is
enabled and the clock count will be incremented by one at each 64th processor clock
cycle. When false, the divider is disabled and the clock count will be incremented at every
processor clock cycle.
UINT32 [in] numEvents — Number of PMU events that are to be monitored as specified
by the user. For clock counting only, this is set to zero.
pmuEvent1, pmuEvent2, pmuEvent3, pmuEvent4 — The specific PMU events to be
monitored by counters as described in section 14.2 and defined in
IxPerfProfAccXscalePmuEvent:
2. To end the counting, call the stop function with parameters:
This function can only be called once IxPerfProfAccEventCountStart has been called. It is the
user's responsibility to allocate the memory for the results pointer before calling the function.
The user may then read/print the values stored in this pointer to obtain the results of the clock/
event counting process. It contains all values of counters and associated overflows.
ixPerfProfAccXscalePmuEventCountStart (
BOOL clkCntDiv,
UINT32 numEvents,
IxPerfProfAccXscalePmuEvent pmuEvent1,
IxPerfProfAccXscalePmuEvent pmuEvent2,
IxPerfProfAccXscalePmuEvent pmuEvent3,
IxPerfProfAccXscalePmuEvent pmuEvent4
IxPerfProfAccXscalePmuEvent {
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_CACHE_MISS = 0,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_CACHE_INSTRUCTION,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_STALL,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_INST_TLB_MISS,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_TLB_MISS,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_BRANCH_EXEC,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_BRANCH_MISPREDICT,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_INST_EXEC,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_FULL_EVERYCYCLE,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_ONCE,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_ACCESS,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_MISS,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_DATA_CACHE_WRITEBACK,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_SW_CHANGE_PC,
IX_PERFPROF_ACC_XSCALE_PMU_EVENT_MAX }
ixPerfProfAccXscalePmuEventCountStop (
ixPerfProfAccXscalePmuResults *eventCountStopResults)