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Processor
Address
Decoder
_
Address
decoder
U3035
on
the
processor
board
decodes
severd
chip_
sel€cts.
Y0,
Y'1,
y5,
and
y7
are
shown
in
relation
to
the
T/6-line
in Figure
6-37.
Flgure
6-33.
Four
maln
bloack
select
outputs
ot
address
decoder
U20tf5.
Maintenance
-
494A1494Ap
Service
Vot.
.t
Figure
6-35.
RAM
select
output
in
retation
to-llXXX.
Figure
6-36.-Ip
and 51050
setect tines
In relation
to 0XXK
GP|B
Board Address
Decoders Address
decoder
U1055
on
the GPIB
board sets its outputs
low
to select
the
GPIA,
the GPIB address
switch and
the
bank latch.
Y2, Y4,
and YG
are shown
in relation
to-TO
in
Figure
6-38.
oxxx
Ixxr
SXXX
erxx
5565-75
----lMm
Itflu|ll
IilMU-
4XXX
lilfi-xilT;
I-
u3025,
PIN
12
5S4{5
ililil1Iililt
fl
t
ilfi
il
ilil1ilililil
ilIIilililil1ilil1ilt
I
axfr.
w
OPTIONS
swtTcH
SELECT
s@4-09
U
0xxx
u302s,
PIN
6
u3025,
PIN
4
5@lL07
Figure
6-34.
RAM
select
ouhut
in
relailon
to
dXXX.
6-53