Tektronix 494A Water Dispenser User Manual


 
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Theory
of
Operation
-
4g4ful4g4Ap
Servtce,
Vot.
I
DISPLAY
SECTTON
(Diagram
6)
FUNCTIONAL
DESCRT
PTION
The
display
section
consists
of
the following
major
blocks:
o
Video
Amplifier
o
Mdeo
Processor
.
Digital
Storage
o
Deflection
Amplifiers
.
Z-Axis
r
CRT
Readout
.
The
Video
Amplifier processes
the
detected
lF
sig_
nal
through
appropriate
amplifiers
for
log
and
tineir
displays,
and provides
pulse
stretching
for
narrow
pulsed
signals.
The
Video
processor
provides
band
leveling
to
corr€ct
front-end
unflatness
through
the
bands,
video
filtering
for
noise
averaging,
out_;f_band
blanking
to
clamp
the
display
to the
basetine
when
the
sweep
is
outside
the
range
of
the
selected
band,
and
video
marker
capability
for
use
with
a
TV
sideband
adapter.
.
Tl"
Digitat
Storage
digitizes
th€
video
and
sweep
signals
and
stores
the
data
in
memory.
Stored
data
is
thsn converted
to
analog
signals
for
ttre Deflection
Amplifier
and
Z-Axis
circuits.
The
Deflection
Amplifier provides
the
drive
voltages
for
the
cRT.
This
includes
vertical
and
horizontal
deflection
signals
as
well
as
readout
characters
from
the CRT
Readout
board.
The
Z-Axis
circuits
receive
and
decode
data
from
the
microcomputer;
accept
control
levels
,rom
the
front-panel
beam
controls
and generate
unblanking
sig_
nals
to
control
the
display
appearance,
brightnessl
aid
focus;
detect
power
failure;
monitor
the inJtrument
vol_
tage
supplies;
and
record
the
elapsed
operating
time.
The
CRT
Readout
circuits generate
the
alphanumeric
characters
for
the
display.
VIDEO
AMpLtFtER
(Diagram
23)
Video
signals,
from
the log
amplifier
and
ctetector
in
the lF
section,
are
received
by
the
Video
Amplifier.
In
the logarithmic
mode,
the
signals
are
amplified
linearly
and
applied
to
the Video
processor.
In
the
linear
mode,
exponential
amplification
converts
the
logarithmic
aain
characteristic
to
lin€ar
function.
In
either
mode,
base_
line
compensation
from
the Vid€o
processor
is applied
to
the video
signal
to compensate
for
any
unflatness
in
the
front-end
response.
The
pulse
stretcir
circuit
at
the
output
of
the Video
Amplifier
atters
narrow pulses
so
data
can
be acquired
and
disptayed
by
the Digital
Storage
logic.
Signal
amplitude
offset
ciicuits provide
display offset
for
the
"ldentify,,mode
operation.
Log
Mode
Circuits
The log
mode
circuits
process
the
VIDEO
signal
from
the
Log
Amplifier,
and
they add
ofrset
for selecting
that
segrnent
of
the log
amplifier gain
curve
to be
displayed.
The
circuits
also
select
screen
display
gain
steps
from
1
dB/div
to
15
dB/div.
The
detected
VIDEO
signat,
the VTDEO
I correction
signal,
an offset
signal,
and
reference
current
are
summed
at
th€
input
to operational
amptifier
U4050.
A
lowpass
filter
removes
l0
MHz
from
the
detected
VIDEO
signal.
The
VTDEO
I signat
is adjusted
on
the
Video
Processor
board (A40)
as
compensation
for
front-end
unflatness.
The signal
is
equal
and opposite
in
amplitude
to
the
unflatness.
Th€ lnput
Ref
Level
adjustment,
Rl
012, sets
the
reference
level.
Signal
9{"9t
is supplied
by
digitaf-to-anatog
converter (DAC)
us1
60.
The DAC
converts
the microcomputer
commands
to
an
offset
signal
that
selects
the
location
on
the
log
amplifier
curve
tor
the
disptay
(see
Figure
7-12).
In
dB/div
or log
display
modes,
a change
in
th6 Vertical
POSITION
control
produces
an
effect
after
the log
amplifier
that is
the
sam€
as a
signal
level or
gain
change
before
the log
amplifier.
Instead
of
using
a
large
amount
of
linear gain
before
the log amplifier,
the
output
of
the DAC effectivety
ofisets
ths
disptay
up or
down along
the log
curve.
This
offs€t
produces
the
same
effect
as varying
the
pOSITION
control
except
the
display
position
does
not change,
only
the signal
level
required
to reach
the reference
level changes.
This
process
allows
the linear
gain
to change while
the
top
of
the screen
is kept
constant,
and
it must also
allow
any 16
dB segment (in
th€
2
dB/div
mode)
to be
displayed.
Nominally,
the log amplifier
operates
with
+6
dBm equivalent
reference
level
at
the top
of
the
screen.
The output
ol
U4050 is
equivatent
to
20 mV/dB. Futl
screen
is 2.2
V, as
set
by lnput
Reference
Level
poten-
tiometer R1012.
From
U4050
the
signal
feeds
the log
mode
gain
circuil
and
the lin€ar
mode
gain
circuit. The
digital control
circuit
selects
between
th€
log and linear
mode
circuits.
7-33