Filter
Top Products
8 - 15 8 - 15
MELSOFT
8 ACCESSIBLE DEVICES AND RANGES
Access Target
Device
(Device Name)
A1N
A0J2H
A1S(-S1)
A1SH
A1SJ(H)
A2C(J)
A2N(-S1)
A2S(-S1)
A2SH(-S1)
A1FX
A2A(-S1)
A2U(-S1)
A2US(-S1)
A2AS
(-S1/-S30)
A2USH-S1
Q02(H)-A
Q06H-A
A3N
A3A
A3U
A4U QnACPU
QCPU
(Q mode)
LCPU Q12DCCPU-V QSCPU FXCPU
Motion
controller
CPU
(Z)
*1
Index register
(V)
*1
(R) *2
*3
File register
(ZR)
*2
Extended file register
(ER
\R)
Link input
(J
\X)
Link output
(J
\Y)
Link relay
(J
\B)
Link special relay
(J
\SB)
Link register
(J
\W)
Direct
link
Link special register
(J
\SW)
Special direct buffer
memory (U
\G)
*4 *5
*1: Data cannot be written to 2 or more consecutive points using WriteDeviceBlock or WriteDeviceBlock2. (Data may be written to only
one point.)
*2: Disabled for the use of Q00JCPU or Q00UJCPU.
*3: When accessing to FX series CPU other than FX
3GCPU and FX3U(C)CPU, specify the data register. The file register (R) can be
specified only when accessing to FX
3GCPU or FX3U(C)CPU.
*
4: In a multi-CPU configuration, read from the shared memory of the host CPU cannot be performed.
In addition, write to the shared memory cannot be performed independently of the host or other CPU.
*5: The device can be used to execute Read/WriteDeviceRandom, Read/Write/DeviceRandom2, Get/SetDevice or Get/SetDevice2, only
when accessing to FX
3U(C)CPU.