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10. Press (CAL) and IF
11l)J
UN and check for the presence of the CAL OSC TUNE signal by
monitoring A3J401 pin 25 with an oscilloscope. If ERR 499 CAL UNLK is displayed and
a signal within the range of -10 V to
+lO
V is present during part of the retrace period,
the fault is on the A3 assembly.
11. If a constant dc voltage is present during the sweep and all of the retrace period, refer to
the IF Section troubleshooting procedure in Chapter 9, “IF Section.”
Variable
Gain
Amplifier
(VGA)
Refer to function block AB of A3 Interface Assembly Schematic Diagram in the
HP 8560 E-Series Spectrum Analyzer Component Level Information.
The VGA provides adjustable gain in the video path. Its nominal gain of 7 can be adjusted
flO%.
U112 removes dc offset to keep U113 in its monotonic range. (Both U112 and U113
are set to the same value.) The DAC settings cannot be changed from the front panel.
Track
and
Hold
Refer to function block AC of A3 Interface Assembly Schematic Diagram in the
HP 8560 E-Series Spectrum Analyzer Component Level Information.
1. Press
(PRESET)
on the spectrum analyzer and set the controls as follows:
Center frequency
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
..300MHz
Span
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OHz
Detector mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sample
Reference level
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -70
dBm
Log dB/division
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
.2
dB/DIV
Sweep time
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ms
2. Disconnect any signal from the spectrum analyzer input. A full scale display of sampled
noise should be present.
3. Trigger an oscilloscope on the positive going edge of HHOLD (A3U506 pin 16).
4. The waveform at
A3TPlO
should be random noise with an average level of approximately
4 V. The noise should have a flat spot in its response while HHOLD is high, indicating
proper operation of U114.
ADC/lnterface
Section 8-23