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ADC
ASM
Refer to function block F of A3 Interface Assembly Schematic Diagram in the
HP 8560 E-Series Spectrum Analyzer Component Level Information.
1. Press
(PRESET)
on the spectrum analyzer and set the controls as follows:
Span
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OHz
Sweep time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60s
Detector mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SAMPLE
2. Check that HSTART-SRC (U504 pin 4) goes TTL high, causing HHOLD (U506 pin 16) to
go high 15 ps later.
3. Check that HSTART-ADC (U506 pin 15) goes TTL high 19 ps after HSTART-SRC goes
high.
4. HHOLD should stay TTL high for approximately 18
ps,
and HSTART-ADC should stay
high for approximately 31
ps.
5. Check that LCMPLT (U504 pin 15) goes TTL low 12
/JS
after HSTART-ADC goes high
(12 bits at 1 ps per bit). LCMPLT indicates that the successive approximation state
machine (SASM) h
as
completed the ADC conversion.
6. Check that LDONE (U506 pin 19) g
oes TTL low approximately 2 ps after LCMPLT goes
low.
ADC
Refer to function block A of A3 Interface Assembly Schematic Diagram in the
HP 8560 E-Series Spectrum Analyzer Component Level Information.
The successive approximation state machine (SASM) consists of A3U527 and A3U528. Upon
the occurrence of HSTART-ADC, the SASM successively toggles bits from high to low
starting with the most significant bit. The digital result is then converted to an analog current
in DAC U518 and compared with the SAMPLED VIDEO. If the DAC current is too high, the
output of U512 will be low, telling the SASM that the “guess” was high and that the bit just
toggled should remain low. It then moves on to the next most significant bit until all 12 bits
have been “guessed” at. Each “guess” takes 1 ps (one cycle of HBADC-CLKO), or 12 ps to
complete a conversion. When the conversion is completed, the SASM sets LCMPLT low. The
bits are written to the data bus by buffers U514 and U516.
1. Set the spectrum analyzer controls as follows:
Center frequency .............................................
..300MH
z
Span
.............................................................
OHz
Sweep time
........................................................
60
s
Detector mode
................................................
SAMPLE
2. Trigger an oscilloscope on HSTART-ADC (U506 pin 15) and monitor the outputs of the
SASM (U527 pins 18 and 19; U528 pins 14 through 23). Each bit should start high and be
switched low. It will either stay low or return to a high state 1 ps later, depending on the
comparison at U512.
3. If the outputs do not exhibit this bit pattern, and the ADC ASM checks are working
properly, suspect A3U527, U528, or one of the latches
(U514/516).
If the output of
8-26
ADC/lnterface
Section