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Theory of Operation
2715 Spectrum Analyzer Service Manual
3-61
8/D 8/D 8/D
AD0−AD7
Internal Parallel Bus
8/D
Buffer
(Bidirectional)
8/D
14.7456 MHz
RAM/ROM
(4 Each)
Interrupt Timer
Audio Timer
Serial Bus
Interface
Status
Buffers
Buffer
(Bidirectional)
Clock
Generator
CLK88
Address
Latches
(3)
Interrupt
Controller
Memory Select
Demultiplexer
A8--A19
Demultiplexer
8/A
8/D
16/A
9/A
20/A 2/A
16/A
6/A To Frequency
Counter
10
2
6
2
Enables
To 50-Pin Connector Digital
Port Display Storage
Legend: N/A = N Address Lines
Buffers
Microprocessor
8
RAM/ROM
Enable
N/D = N Data Lines
Figure 3- 24: Microprocessor Block Diagram