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Theory of Operation
3-80
2715 Spectrum Analyzer Service Manual
The lock control circuitry is used to switch the AFC loop (mentioned in the
downconverter description) ON or OFF as required in the course of getting the
video demodulator locked onto a new TV channel. The AFC loop needs to be
reset by the instrument firmware on certain occasions (such as instrument
re--tuning) to assure that the demodulator is locked to the correct channel.
The locking procedure, carried out by the instrument’s firmware, is to first tune the
spectrum analyzer to the desired center frequency. Then, the microprocessor applies
a nominally correct tuning voltage to one half of CR2 by sending an appropriate
setting to the DAC. At this point the demodulator may still be locked to the wrong
thing (if so, usually the adjacent channel’s sound carrier), so the final step in the
procedure is to momentarily disable the AFC by switching the AFC tuning line to a
midrange value (done by part of U8). When this is done, the demodulator IC will
re--lock to the correct video carrier, although the IF frequency will still be off by as
much as a few hundred kHz due to drift and tolerances. After a brief delay the
microprocessor re--enables the AFC, which restores the frequency offset to virtually
zero. At this point, valid sync pulses are available from the video demodulator
system.
The tuning DAC setting used is calculated from: dac_val = 165 -- 20.44 * freq_diff.
The dac_val ranges from 0 through 255, and the freq_diff is the difference in MHz
between the instrument’s frequency setting and that channel’s visual carrier
frequency. For example, if the instrument is to measure the CSO component at
1.25 MHz above the visual carrier, the correct dac_val is 139.
Sweep
A Miller integrator, U270, is the core of the sweep generator. With a logic low at pin
16 of the analog switch U260B, the switch is closed. All of the timing current from
pin 3 of U170 then flows through the switch, and the voltage across the switch is
nearly 0 V. Thus, the sweep voltage is approximately the same as the voltage at pin 3
of U270 〈≈+1.3 V). When the sweep logic circuit, U460, receives the proper signal,
pin 19 goes to a high state and the switch (U260B) opens. All of the timing current
is then steered to the timing capacitors, and they begin to charge. Operational
amplifier U270 maintains a 0 V difference between its input pins 2 and 3 by
changing its output voltage to provide the displacement current to the timing
capacitors. Since the capacitor char ges linearly, the resultant output at pin 6 of U270
appears to decrease linearly. Thus, the sweep is generated.
The sweep continues to decrease until the voltage at pin 9 of U470B is less than the
voltage at pin 10 (of U470B). At that time, the output of U470B goes to a low state
and clears the sweep gate flip flop inside U460, and a retrace cycle is initiated. The
sweep logic circuit, U460, sets pin 16 of U260B low, closing the analog switch. The
timing current is diverted from the timing capacitors, and the capacitors begin to
discharge. The resultant sweep voltage starts to rise. When sweep voltage discharges
to within 28 mV of its final value, the output of U540B goes to a high state. This
releases holdoff capacitors C253 and C252. One of these begins to charge.
AFC Lock Control
Circuitry