Filter
Top Products
Theory of
Operaton
-
494[l4g4Ap
Servlce,
Vol.
1
Figure 7-12.
Selecdon
ol display
positlon
on
lhe
log
scale.
Log mode
amplifier
U4030 tinearty
amptifies
the sig-
nal.
(fhe
log conversion
took
place
in the
Log
Amp
cir-
cuit.)
At 2.2 V
input,
the output
of amptifier
U40S0 is
0
V. This
is
the only
voltage
at
which
the feedback
cir-
cuit switching
network
resistors
of amplifier
U4030 can
be
switched
withont
changing
the output
voltage.
The
switching
network
is
described
later
in this
discussion.
When
the log
mode
is
selected,
the
output
signal
from
U4030 is applied
through
FET
e5035 to the output
amplifier.
Output
Reference
Level
potentiometer
Rl030, in
the input
circuit
to
U5030,
adjusts
the
output
level
for
a full
screen
display
after Input
Reference
Level
potentiometer
R1012
is
set for no change
in
the
output of
U4030
when
switching
between
the 10
dB/div
and 2
dBldiv modes.
The
gain
switching
network
switches resistors
in or
out of
the
fe€dback
path
of amplifier
U4090.
The
net-
work consists
of
Q4035,
e4090, e4155, and
e4150,
and
associated
resistors.
The FET switches (controlled
by data bits
0, 1,
2,
and
3
from
the instrument
data
bus)
switch
in
feedback
resistors
lor
U4030
in
combinations
determined
by
the
four
data
bits.
Linear Mode
Circuits
The linear
mode
circuits
accept
the
logarithmically
scaled
output
from
U4050
and
rescale
the signal
level
to
linear values.
Since
the input
signals
are logarithmi-
cally scaled,
the signal
level
is
exponentiated
to
operate
the system
in
the linear
mod€.
High
gain
is required
at
the
top
of
the screen
and
low
gain
is required
at
the
bottom
of
the screen
to offset
the characteristics
of
the
Log Amplifier
circuits.
7-34
In
th€
linear
mode,
FET switch
Q5150
is
on.
ena-
bling
the
linear mode signal
path;
and
Q5035
is
off,
disabling
the
log mode
path.
The
output
from
preamplifier
U4050
is also
applied
to
linear mode
opera-
tional
amplifier
U4070,
with a successive
resistor
net-
work switched into
the
feedback
path.
From
this
amplifier,
the output
signal is applied
through FET
Q5150 to
the summing
node
at
the input of output
amplifier
U5030.
With a *6
dBm
input
to th€
Vid€o Amplifier,
the
out-
put
of
U4070 is
0
V. This is
the
level
that represents
the
top
ot
the
screen.
At
that level,
the
foedback
path
is
only
through resistors R4118
and
R5112.
Diode
CR4125
and R41 22
are only activa
when needed
to
limit
negative
excursions.
The other feedback
resistors
(switch
transistor emitt€r r€sistors)
ar€
not
in the
path,
because the switch
transistors
are
biased off
by the
divider network at
the
transistor bases.
As
the display
moves
away from full screen,
th€ out-
put
voltage of
U4070
increases and
turns transistor
O4120 on.
This
places
R4124 in
parallel
with
the
tixed
feedback
resistors, thus
reducing
the
gain.
As
the
vol-
tage output increases,
transistors 04125, Q4065. and
04060
start
to
conduct
in sequence,
adding
their
emitter resistors
across
the
feedback
path.
This
effectively reduces the
gain
of
U4070
exponentially.
The
transistor
characteristics
smooth
the
step
transi-
tions,
producing
a
smooth exponential
gain
curve.
Diode
CR41
'l
5
provides
ternperature
compensation
for
the switching
transistors.
The Lin Mode
Balance con'
trol,
R1025, sets
the
U4070
output
level
to
match
the
log mode output.
Pulse
Stretch Circuit
The
pulse
stretch
circuit
consists of
FET switch
Q5026
and
the
associated components. When
the
pulse
stretch mode
is not sglect€d
{data
bit
7 on
the
instrum€nt
data bus
is low),
pin
13
of
U4020C
pulls
down to
-1
5
V, and Q5026 biases
off. This removes
C5024
from
the
circuit
and also supplies sufficient nega-
tive bias to
keep
CR5025
fonvard biased.
With
CR5025
on,
the
feedback loop for U5030, through
Q5025
and
R5033 is closed so the
signal output will fall as fast as
its rise.
when
the
pulse
stretch
mode is selected
(data
bit
7
high),
the
open collector
output of
u4020c
(pin
13) is
allowed
to
float. This turns Q5026
on
which completes
the
path
for
C5024 to
ground.
During
signal rise
time,
C5024
charges
through the
low
impedance
of
CR5025.
The feedback
path
for
U5030
is still closed which
pro-
vides a fast
rise time.
When
the
output
of U5030
begins to
fall,
CR5025
turns
off and
the
signal
fall
time is
now a function
of
the
RC
time constant
of R5031 and
C5024.
since the
f€ed-
*
*10
dBm
TH|S 16
dB
SEGMENT
LIN
ouT
80 dB
Total
MAY
BE
MOVED
TO
ANY
POSITION
ON
LOG
CURVE
dB
IN
4416-1
t3