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Appendix A: Options and Accessories
AĆ8
AWG2021 User Manual
Digital Data Latch Example. Figure A-9 shows an example of an external circuit
for latching the digital data.
D0
D1
D2
Q1
Q1
Q2
Q2
D3
Q3
Q3
D4
Q4
Q4
D5
Q5
Q5
Q0
Q0
MR
CLK
D0
D1
D2
Q1
Q2
Q2
D3
Q3
Q3
D4
Q4
Q4
D5
Q5
Q5
Q0
Q0
MR
CLK
CLOCK
*CLOCK
D0
*D0
D11
*D11
RESISTOR: 50 ohm
CAPACITOR: 0.1 mF
DELAY LINE
4ns
10E116
10E116
-2 V
-2 V
-2 V
-2 V
-2 V
10E116
-2 V
10E151
10E151
DB0ĆDB11
Q1
Figure AĆ9: Waveform Reproduction Circuit Example