Intel SA-1110 Food Processor User Manual


 
SA-1110 Developer’s Manual 11
11.10.2.5Data Field ..................................................................................................... 304
11.10.2.6CRC Field..................................................................................................... 304
11.10.2.7Baud Rate Generation.................................................................................. 305
11.10.2.8Receive Operation........................................................................................ 305
11.10.2.9Transmit Operation....................................................................................... 306
11.10.2.10Transmit and Receive FIFOs...................................................................... 307
11.10.2.11CPU and DMA Register Access Sizes ....................................................... 308
11.10.3 UART Register Definition .............................................................................................308
11.10.4 UART Control Register 4..............................................................................................308
11.10.4.1HP-SIR Enable (HSE) .................................................................................. 308
11.10.4.2Low-Power Mode (LPM)............................................................................... 308
11.10.5 HSSP Register Definitions309
11.10.6 HSSP Control Register 0..............................................................................................309
11.10.6.1IrDA Transmission Rate (ITR) ...................................................................... 309
11.10.6.2Loopback Mode (LBM) ................................................................................. 310
11.10.6.3Transmit FIFO Underrun Select (TUS)......................................................... 310
11.10.6.4Transmit Enable (TXE)................................................................................. 311
11.10.6.5Receive Enable (RXE).................................................................................. 311
11.10.6.6Receive FIFO Interrupt Enable (RIE) ........................................................... 311
11.10.6.7Transmit FIFO Interrupt Enable (TIE)........................................................... 312
11.10.6.8Address Match Enable (AME) ...................................................................... 312
11.10.7 HSSP Control Register 1.............................................................................................313
11.10.7.1Address Match Value (AMV) ........................................................................ 313
11.10.8 HSSP Control Register 2.............................................................................................314
11.10.8.1Transmit Pin Polarity Select (TXP)............................................................... 314
11.10.8.2Receive Pin Polarity Select (RXP)................................................................ 315
11.10.9 HSSP Data Register....................................................................................................316
11.10.10 HSSP Status Register 0.............................................................................................317
11.10.10.1 End/Error in FIFO Status (EIF) (read-only, nonmaskable interrupt).......... 318
11.10.10.2 Transmit Underrun Status (TUR) (read/write, maskable interrupt)............ 318
11.10.10.3 Receiver Abort Status (RAB) (read/write, nonmaskable interrupt)............ 318
11.10.10.4 Transmit FIFO Service Request Flag (TFS)
(read-only, maskable interrupt) ..................................................................... 318
11.10.10.5 Receive FIFO Service Request Flag (RFS)
(read-only, maskable interrupt) ..................................................................... 319
11.10.10.6 Framing Error Status (FRE) (read/write, nonmaskable interrupt).............. 319
11.10.11 HSSP Status Register 1.............................................................................................320
11.10.11.1 Receiver Synchronized Flag (RSY) (read-only, noninterruptible).............. 321
11.10.11.2 Transmitter Busy Flag (TBY) (read-only, noninterruptible)........................ 321
11.10.11.3 Receive FIFO Not Empty Flag (RNE) (read-only, noninterruptible) .......... 321
11.10.11.4 Transmit FIFO Not Full Flag (TNF) (read-only, noninterruptible) .............. 321
11.10.11.5 End-of-Frame Flag (EOF) (read-only, noninterruptible) ............................ 321
11.10.11.6 CRC Error Flag (CRE) (read-only, noninterruptible).................................. 321
11.10.11.7 Receiver Overrun Status (ROR) (read-only, noninterruptible)................... 322
11.10.12 UART Register Locations...........................................................................................323
11.10.13 HSSP Register Locations...........................................................................................324
11.11Serial Port 3 – UART...............................................................................................................325
11.11.1 UART Operation...........................................................................................................325