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432 SA-1110 Developer’s Manual
Register Summary
0h B000 0080 DDAR4 DMA device address register 4.
0h B000 0084
DCSR4
DMA control/status register 4 – write ones to set.
0h B000 0088 Write ones to clear.
0h B000 008C Read only.
0h B000 0090 DBSA4 DMA buffer A start address 4.
0h B000 0094 DBTA4 DMA buffer A transfer count 4.
0h B000 0098 DBSB4 DMA buffer B start address 4.
0h B000 009C DBTB4 DMA buffer B transfer count 4.
0h B000 00A0 DDAR5 DMA device address register 5.
0h B000 00A4
DCSR5
DMA control/status register 5 – write ones to set.
0h B000 00A8 Write ones to clear.
0h B000 00AC Read only.
0h B000 00B0 DBSA5 DMA buffer A start address 5.
0h B000 00B4 DBTA5 DMA buffer A transfer count 5.
0h B000 00B8 DBSB5 DMA buffer B start address 5.
0h B000 00BC DBTB5 DMA buffer B transfer count 5.
LCD Controller Registers
0h B010 0000 LCCR0 LCD controller control register 0.
0h B010 0004 LCSR LCD controller status register.
0h B010 0008 – 0hB010 000C — Reserved.
0h B010 0010 DBAR1 DMA channel 1 base address register.
0h B010 0014 DCAR1 DMA channel 1 current address register.
0h B010 0018 DBAR2 DMA channel 2 base address register.
0h B010 001C DCAR2 DMA channel 2 current address register.
0h B010 0020 LCCR1 LCD controller control register 1.
0h B010 0024 LCCR2 LCD controller control register 2.
0h B010 0028 LCCR3 LCD controller control register 3.
0h B010 002C – 0h B010 FFFF — Reserved.
Physical Address Symbol Register Name