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188 SA-1110 Developer’s Manual
Memory and PC-Card Control Module
Figure 10-25 shows a system using 4M x 16-bit SDRAM devices for a total of 48 Mbytes. See
Section 10.3.1 and Table 10-8 for descriptions of SDRAM address pin connections.
Figure 10-25. SDRAM System Example
A6631-01
A23/DRA13-A10/DRA0
nSDRAS,nSDCAS,SDCLK2-1,SDCKE1,nWE
nRAS/nSDCS2-0
D31-0 D31-16
3-2
D15-0
0-1
nCAS/DQM3-0
3
2
210
CS#
RAS#
CAS#
CLK
CKE
WE#
A13-0
DQMH
DQML
4Mx16
SDRAM
DQ15-0
CS#
RAS#
CAS#
CLK
CKE
WE#
A13-0
DQMH
DQML
4Mx16
SDRAM
DQ15-0
CS#
RAS#
CAS#
CLK
CKE
WE#
A13-0
DQMH
DQML
4Mx16
SDRAM
DQ15-0
CS#
RAS#
CAS#
CLK
CKE
WE#
A13-0
DQMH
DQML
4Mx16
SDRAM
DQ15-0
CS#
RAS#
CAS#
CLK
CKE
WE#
A13-0
DQMH
DQML
4Mx16
SDRAM
DQ15-0
CS#
RAS#
CAS#
CLK
CKE
WE#
A13-0
DQMH
DQML
4Mx16
SDRAM
DQ15-0
1
0
1
0
1
0
3
2
3
2