Filter
Top Products
166 SA-1110 Developer’s Manual
Memory and PC-Card Control Module
Figure 10-12. Nonburst ROM, SRAM, or Flash Read Timing Diagram – Four Data Beats)
A6641-02
Memory
Clock
nCS0
A[25:0]
nCS1
nOE
RD/nWR
nCAS[3:0]
(SRAM only)
A0 A1 A2
RDF+1
RDF+1
RDF+1
max* (2*RRR,1)
Contents of static memory register fields:
MSC0:RDF0=7 MSC0:RRR0=2
Read
(Input)
Data
RDF+1.5
RDF+2
A3