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38 SA-1110 Developer’s Manual
Functional Description
Figure 2-3. SA-1110 Memory Map
Note: The upper 64MBytes of each 128MByte static bank select cannot be accessed because only 26 bits
of the physical address are available on external pins. Attempts to accesses any static bank selects
upper 64Mbyte will actually cause an access to that bank selects lower 64MByte, because the
missing (27th) physical address bit is ignored.
A9080-01
Dynamic Memory Interface
512 Mbytes
Internal Registers
1 Gbyte
0hC000 0000
0h8000 0000
0h4000 0000
0h5000 0000
0h2000 0000
0h0000 0000
Static Memory or Variable
Latency I/O Interface
256 Mbytes
PCMCIA Interface
512 Mbytes
Static Memory Interface
(ROM, Flash, SRAM)
512 Mbytes
Cache flush replacement data.
Reads return zero
128 Mbytes
Reserved (384 Mbytes)
Zeros Bank (128 Mbytes)
DRAM Bank 3 (128 Mbytes)
Reserved (768 Mbytes)
DRAM Bank 2 (128 Mbytes)
DRAM Bank 1 (128 Mbytes)
DRAM Bank 0 (128 Mbytes)
Static Bank Select 3 (128 Mbytes)
Static Bank Select 2 (128 Mbytes)
Static Bank Select 1 (128 Mbytes)
Static Bank Select 0 (128 Mbytes)
Static Bank Select 5 (128 Mbytes)
Static Bank Select 4 (128 Mbytes)
LCD and DMA Registers
(256 Mbytes)
Memory and Expansion Registers
(256 Mbytes)
System Control Module Registers
(256 Mbytes)
Peripheral Control Module Registers
(256 Mbytes)
PCMCIA Socket 1 Space
(256 Mbytes)
PCMCIA Socket 0 Space
(256 Mbytes)
Variable Latency I/O Interface
128 Mbytes