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SA-1110 Developer’s Manual 63
Coprocessors
The IBCR is a write-only register used to load an address breakpoint address and to set an enable
bit for the function. If an address is loaded with bit 0 (E) set, then the address is enabled as a
breakpoint. If bit zero is cleared, then the breakpoint is disabled. Bit 1 is reserved and should be
written to zero.
6.2.14 Register 15 – Test, Clock, and Idle Control
Register 15 is a write-only register. The CRm and OPC_2 fields are used to encode the following
control operations. Operation for all other values of OPC_2 and CRm is unpredictable.
1saw
Store address watch
0 – Disable store address watch
1 – Enable store address watch
2sdw
Store data watch
0 – Disable store data watch
1 – Enable store data watch
31..3 — Reserved.
Data Breakpoint Control Register
(DBCR)
Read/Write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
sdw
saw
lw
Bits Name Description
Instruction Breakpoint Address
and Control Register (IBCR)
Write-Only
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Instruction Address Breakpoint Value
Reserved
E
Bits Name Description
0E
Address break enable/disable.
0 – Disable
1 – Enable
1 —
Reserved.
Should be written as zero.
31..2 Address breakpoint address.