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14 SA-1110 Developer’s Manual
11.12.7.1Frame Format................................................................................................366
11.12.7.2Baud Rate Generation...................................................................................370
11.12.7.3SSP Transmit and Receive FIFOs ................................................................370
11.12.7.4CPU and DMA Register Access Sizes..........................................................371
11.12.7.5Alternate SSP Pin Assignment......................................................................371
11.12.8 SSP Register Definitions ..............................................................................................371
11.12.9 SSP Control Register 0 ................................................................................................372
11.12.9.1Data Size Select (DSS)............................................................................... 372
11.12.9.2Frame Format (FRF) .....................................................................................372
11.12.9.3Synchronous Serial Port Enable (SSE).........................................................372
11.12.9.4Serial Clock Rate (SCR)................................................................................373
11.12.10SSP Control Register 1............................................................................................... 374
11.12.10.1Receive FIFO Interrupt Enable (RIE) ..........................................................374
11.12.10.2Transmit FIFO Interrupt Enable (TIE)..........................................................374
11.12.10.3Loopback Mode (LBM)................................................................................375
11.12.10.4Serial Clock Polarity (SPO) .........................................................................375
11.12.10.5Serial Clock Phase (SPH) ...........................................................................375
11.12.10.6External Clock Select (ECS) .......................................................................376
11.12.11SSP Data Register......................................................................................................377
11.12.12SSP Status Register ...................................................................................................379
11.12.12.1Transmit FIFO Not Full Flag (TNF) (read-only, noninterruptible) ................379
11.12.12.2Receive FIFO Not Empty Flag (RNE) (read-only, noninterruptible) ............379
11.12.12.3SSP Busy Flag (BSY) (read-only, noninterruptible) ....................................379
11.12.12.4Transmit FIFO Service Request Flag (TFS)
(read-only, maskable interrupt)......................................................................379
11.12.12.5Receive FIFO Service Request Flag (RFS)
(read-only, maskable interrupt)......................................................................380
11.12.12.6Receiver Overrun Status (ROR) (read/write, nonmaskable interrupt).........380
11.12.13MCP Register Locations .............................................................................................381
11.12.14SSP Register Locations.............................................................................................. 382
11.13Peripheral Pin Controller (PPC) ..............................................................................................382
11.13.1 PPC Operation .............................................................................................................382
11.13.2 PPC Register Definitions..............................................................................................383
11.13.3 PPC Pin Direction Register ..........................................................................................383
11.13.4 PPC Pin State Register ................................................................................................385
11.13.5 PPC Pin Assignment Register......................................................................................387
11.13.5.1UART Pin Reassignment (UPR) ...................................................................387
11.13.5.2SSP Pin Reassignment (SPR) ......................................................................387
11.13.6 PPC Sleep Mode Pin Direction Register......................................................................388
11.13.7 PPC Pin Flag Register .................................................................................................390
11.13.8 PPC Register Locations ...............................................................................................392
12 DC Parameters
12.1Absolute Maximum Ratings ......................................................................................................393
12.2DC Operating Conditions..........................................................................................................394
12.3Power Supply Voltages and Currents.......................................................................................395
13 AC Parameters
13.1Test Conditions.........................................................................................................................397