Intel SA-1110 Food Processor User Manual


 
SA-1110 Developers Manual 303
Peripheral Control Module
11.10.2.2 HSSP Frame Format
When the 4-Mbps transmission rate is used, the high-speed serial/parallel (HSSP) interface within
the ICP is used along with the 4PPM bit encoding. The HSSP frame format is shown in
Figure 11-26.
Figure 11-26. High-Speed Serial Frame Format for IrDA Transmission (4.0 Mbps)
Data = 00
Data = 01
Data = 10
Data = 11
Figure 11-25. 4PPM Modulation Example
4PPM
Data
Reordered
Nibbles
01001110
125ns
Timeslots
1234123412341234
Chips
1
2
34
Receive data sample counter frequency = 6X timeslot frequency; each timeslot sampled on third clock.
Original
Byte Order
10110001
Nibble 3 Nibble 2 Nibble 1 Nibble 0
Nibble 0 Nibble 1 Nibble 2 Nibble 3
64 chips 8 chips
4 chips
(8 bits)
4chips
(8 bits)
8180 chips
maximum
(2045 bytes)
16 chips
(32 bits)
8chips
Preamble Start Flag Address
Control
(optional)
Data CRC-32 Stop Flag
Start Flag |0000|1100|0000|1100|0110|0000|0110|0000|
|0000|1100|0000|1100|0000|0110|0000|0110| Stop Flag
Preamble |1000|0000|1010|1000|... repeated 16 times