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156 SA-1110 Developer’s Manual
Memory and PC-Card Control Module
Figure 10-5. SDRAM State Machine
Power-down
PWRDNX
PWRDN
PALL
CBR
Self-refresh
and
Clock-stop
Self-refresh
Reset (Hardware or Sleep)
!Last_Beat
Last_Beat
Burst !Burst
Enter_Sleep ||
Clear_KnRUN
!Enter_Sleep &&
Set_KnRUN
Power-down
and
Clock-stop
Clear_KnRUN ||
Auto_Power_Down
Set_KnRUN ||
(KnRUN &&
(Auto_Power_Up ||
Enter_Sleep ||
Set_SLFRSH))
Enter_Sleep ||
Set_SLFRSH
Enter_Sleep ||
Set_SLFRSH
!Enter_Sleep &&
!Clear_KnRUN &&
Clear_SLFRSH
(Set_E1PIN ||
(E1PIN &&
(Auto_Power_Up ||
Enter_Sleep || Set_SLFRSH))) &&
!Clear_KnRUN
SLFRSH
ACT
MRS
!Enter_Sleep &&
!Set_SLFRSH &&
(Clear_E1PIN ||
Auto_Power_Down)
!Enter_Sleep &&
!Set_SLFRSH
!Enter_Sleep &&
!Set_SLFRSH &&
!Clear_E1PIN &&
Refresh &&
!First_Refresh
!Enter_Sleep &&
!Set_SLFRSH &&
!Clear_E1PIN &&
Refresh &&
First_Refresh
!Enter_Sleep && !Set_SLFRSH &&
!Clear_E1PIN && !Refresh &&
!New_Enable && New_Access
!Enter_Sleep && !Set_SLFRSH &&
!Clear_E1PIN && !Refresh &&
New_Enable
Idle
READ
or
WRIT
READAP
or
WRITEAP