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SA-1110 Developer’s Manual 299
Peripheral Control Module
11.9.5 UART Register Locations
Table 11-15 shows the registers associated with the UART and the physical addresses used to
access them. See the Section 11.9, “Serial Port 1 – GPCLK/UART” on page 11-295 for a
description of the programming and operation of the UART (serial port 1’s UART is identical to
serial port 3’s UART).
0h 8002 006C GPCLKR2 Read/Write
7 6 5 4 3 2 1 0
Reserved BRD 11..8
Reset
0 0 0 0 ? ? ? ?
Bits Name Description
3..0 BRD 11..8
Baud rate divisor.
Encoded value (from 0 to 4095). Used to generate the baud rate of the GPCLK.
Baud Rate = 3.6864x10
6
/((BRD+1)), where BRD is a decimal value.
7..4 — Reserved.
0h 8002 0070 GPCLKR3 Read/Write
7 6 5 4 3 2 1 0
BRD 7..0
Reset
? ? ? ? ? ? ? ?
Bits Name Description
7..0 BRD 7..0
Baud rate divisor.
Encoded value (from 0 to 4095). Used to generate the baud rate of the GPCLK.
Baud Rate = 3.6864x10
6
/((BRD+1)), where BRD is a decimal value.
Table 11-15. UART Control, Data, and Status Register Locations
Address Name Description
0h 8001 0000 UTCR0 UART control register 0
0h 8001 0004 UTCR1 UART control register 1
0h 8001 0008 UTCR2 UART control register 2
0h 8001 000C UTCR3 UART control register 3
0h 8001 0010 — Reserved
0h 8001 0014 UTDR UART data register
0h 8001 0018 — Reserved